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D301 Datasheet(PDF) 254 Page - Microchip Technology |
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D301 Datasheet(HTML) 254 Page - Microchip Technology |
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254 / 416 page  PIC24FJ256GA705 FAMILY DS30010118D-page 254 2016-2018 Microchip Technology Inc. 21.3 Registers 21.3.1 RTCC CONTROL REGISTERS REGISTER 21-1: RTCCON1L: RTCC CONTROL REGISTER 1 (LOW) R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 RTCEN — — — WRLOCK PWCEN PWCPOL PWCPOE bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0 RTCOE OUTSEL2 OUTSEL1 OUTSEL0 — — — TSAEN bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 RTCEN: RTCC Enable bit 1 = RTCC is enabled and counts from selected clock source 0 = RTCC is not enabled bit 14-12 Unimplemented: Read as ‘0’ bit 11 WRLOCK: RTCC Register Write Lock 1 = RTCC registers are locked 0 = RTCC registers may be written to by user bit 10 PWCEN: Power Control Enable bit 1 = Power control is enabled 0 = Power control is disabled bit 9 PWCPOL: Power Control Polarity bit 1 = Power control output is active-high 0 = Power control output is active-low bit 8 PWCPOE: Power Control Output Enable bit 1 = Power control output pin is enabled 0 = Power control output pin is disabled bit 7 RTCOE: RTCC Output Enable bit 1 = RTCC output is enabled 0 = RTCC output is disabled bit 6-4 OUTSEL<2:0>: RTCC Output Signal Selection bits 111 = Unused 110 = Unused 101 = Unused 100 = Timestamp A event 011 = Power control 010 = RTCC input clock 001 = Second clock 000 = Alarm event bit 3-1 Unimplemented: Read as ‘0’ bit 0 TSAEN: Timestamp A Enable bit 1 = Timestamp event will occur when a low pulse is detected on the TMPRN pin 0 = Timestamp is disabled |
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