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AN78L05ME1 Datasheet(PDF) 7 Page - Panasonic Semiconductor |
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AN78L05ME1 Datasheet(HTML) 7 Page - Panasonic Semiconductor |
7 / 10 page ![]() AN78L05M 7 SFF00105BEB 30 5 — IOUT = 1 mA to 40 mA, Tj = 25°C 100 45 — VIN = 8 V to 20 V, Tj = 25°C *1 mV 60 11 — IOUT = 1 mA to 100 mA, Tj = 25°C REGL Load regulation 4 *1 mA 3.0 2.0 — Tj = 25°C IBias Bias current 5 *1 mA 1.0 — — VIN = 8 V to 20 V, Tj = 25°C ΔIBias(IN) Bias current fluctuation to input 6 *1 mA 0.1 — — IOUT = 1 mA to 40 mA, Tj = 25°C ΔIBias(L) Bias current fluctuation to load 7 *1 mV 150 55 — VIN = 7.5 V to 20 V, Tj = 25°C REGIN Line regulation 3 VIN = 7.5 V to 20 V, IOUT = 1 mA to 70 mA *1 V 5.25 — VOUT Output voltage tolerance 4.75 *1 V 5.2 5.0 4.8 Tj = 25°C VOUT Output voltage 1 2 — dB — 57 47 VIN = 8 V to 18 V, IOUT = 40 mA, f = 120 Hz RR Ripple rejection ratio 8 Limits Typ Unit Max Note Min Conditions Symbol Parameter B No. Note) *1: The specified condition T j = 25°C means that the test should be carried out within so short a test time (within 10ms) that the characteristic value drift due to the chip junction temperature rise can be ignored. Electrical Characteristics Note) Unless otherwise specified, T a = 25°C±2°C, VIN = 10 V, IOUT = 40 mA, CIN = 0.33 μF and COUT = 0.1 μF, Tj = 0°C to 125°C |
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