DA6240C.007

17 October, 2016

2 (13)

BLOCK & APPLICATION DIAGRAM

1x/2x/3x Charge Pump

VOUT

CP1

CN1

VIN (3V)

GND

DIN

Control

Logic

Oscillator

1MHz

CFLY1=0.1uF

COUT=0.1uF

CIN=0.1uF

EN1

PIEZO

SOUNDER

CP2

CN2

CFLY2=0.1uF

EN2

Short Circuit

Protection

VO1

VO2

900k

Pull Down

Resistor

MAS6240C1/C2

1kΩ…2kΩ

Output

Protection

(optional)

Figure 1. C1 or C2 Version Charge Pump + Single End Piezo Driver (max 9Vpp)

PIEZO

SOUNDER

1kΩ…2kΩ

Output

Protection

(optional)

1x/2x/3x Charge Pump

VOUT

CP1

CN1

VIN (3V)

GND

DIN

Control

Logic

Oscillator

1MHz

CFLY1=0.1uF

COUT=0.1uF

CIN=0.1uF

EN1

CP2

CN2

FLY2=0.1uF

EN2

Short Circuit

Protection

VO1

VO2

900k

Pull Down

Resistor

MAS6240C2

Figure 2. C2 Version Charge Pump + Differential Piezo Driver (max 18Vpp)

The application figures 1 and 2 include optional 1kΩ…2kΩ output protection resistor which offers an extra

protection for the over voltage that the piezo element could generate in a mechanical shock.

The input (CIN), fly (CFLY1, CFLY2) and output (COUT) capacitor value selections affect output ripple and

inrush current drawn from input during startup. See table 1 for selecting capacitor values at different

applications. The capacitors must be ceramic type with low ESR and meeting following minimum voltage ratings:

min 6.3V for CIN and CFLY1-CFLY2 and min 16V for COUT.

Table 1. Capacitor value selections at different applications

CIN

CFLY1-2

COUT

Application

100nF

100nF

100nF

Minimum size layout but increased inrush current

10µF

100nF

100nF

Battery cell operated device with low startup inrush current

10µF

100nF

1µF

Low output ripple application with medium inrush current