HMS30C7202N
© 2004 MagnaChip Semiconductor Ltd. All Rights Reserved.
Version 1.1
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FEATURES
32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz
8Kbytes combined instruction/data cache
Memory management unit
Supports Little Endian operating system
2Kbytes SRAM for internal buffer memory
On-chip peripherals with individual power-down:
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Multi-channel DMA
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4 Timer Channels with Watch Dog Timer
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Intelligent Interrupt Controller
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Memory controller for ROM, Flash, SRAM, SDRAM
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Power management unit
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LCD Controller for mono/color STN and TFT LCD
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Real-time clock (32.768kHz oscillator)
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Infrared communications (SIR support)
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4 UARTs (16C550 compatible)
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PS/2 External Keyboard / Mouse interface
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2 Pulse-Width-Modulated (PWM) interface
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Matrix Keyboard control interface (8*8)
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GPIO
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MMC / SMC Card interface
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USB (slave)
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On-chip ADC and interface module (Battery Check, Audio In, Touch Panel)
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On-chip DAC and interface module (8 Bit Stereo Audio Output)
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3 PLLs
Figure A. Functional Block Diagram
JTAG debug interface and boundary scan
0.25um Low Power CMOS Process
2.5V internal / 3.3V IO supply voltage
256-pin MQFP / FBGA package
Low power consumption
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