IS25LP032D-RKLA3:P datasheet(37/118 Pages) ISSI

37 / 118 page

IS25LP032D

IS25WP032D

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A12

08/04/2020

FAST READ OPERATION IN QPI MODE (FRD, 0Bh)

The FAST READ (FRD) instruction is used also in QPI mode to read memory data at up to a 133MHz clock.

The FAST READ instruction code (2 clocks) is followed by three address bytes (A23-A0

— 6 clocks) and dummy

cycles (configurable, default is 6 cycles), transmitted via the IO3, IO2, IO1 and IO0 lines, with each bit latched-in

during the rising edge of SCK. Then the first data byte addressed is shifted out on the IO3, IO2, IO1 and IO0 lines,

with each bit shifted out at a maximum frequency fCT, during the falling edge of SCK.

The first byte addressed can be at any memory location. The address is automatically incremented by one after

each byte of data is shifted out. When the highest address is reached, the address counter will roll over to the

000000h address, allowing the entire memory to be read with a single FAST READ instruction. The FAST READ

instruction in QPI mode is terminated by driving CE# high (VIH).

If the FAST READ instruction is issued while an Erase, Program or Write cycle is in process (WIP=1) the instruction

is ignored without affecting the current cycle.

The Fast Read sequence in QPI mode is also applied to the commands in the following table 8.3.

Table 8.3 Instructions that Fast Read sequence in QPI Mode is applied to

Instruction Name

Operation

Hex Code

FRQIO

Fast Read Quad I/O

EBh

RDUID

Read Unique ID

4Bh

IRRD

Read Information Row

68h

Figure 8.3 Fast Read Sequence In QPI Mode

0Bh

CE#

SCK

IO[3:0]

6 Dummy Cycles

3-byte Address

...

Mode 3

Mode 0

23:20

7:4

3:0

7:4

3:0

Data 1

Data 2

19:16 15:12 11:8

7:4

3:0

...

Instruction

Note: Number of dummy cycles depends on Read Parameter setting. Detailed information in Table 6.11 Read Dummy

Cycles.

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