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AM6548BACDXEAF Datasheet(PDF) 180 Page - Texas Instruments |
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AM6548BACDXEAF Datasheet(HTML) 180 Page - Texas Instruments |
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180 / 282 page ![]() NO.(2) PARAMETER DESCRIPTION MODE(19) MIN MAX UNIT F9 td(clkH-advnIV) Delay time, output clock GPMC_CLK rising edge to output address valid and address latch enable GPMC_ADVn_ALE invalid div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1; no extra_delay -2.3+D (4) 4.5+D (4) ns F10 td(clkH-oen) Delay time, output clock GPMC_CLK rising edge to output enable GPMC_OEn_REn transition div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1; no extra_delay -2.3H (8) 3.5+H (8) ns F11 td(clkH-oenIV) Delay time, output clock GPMC_CLK rising edge to output enable GPMC_OEn_REn invalid div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1; no extra_delay -2.3+E (8) 3.5+E (8) ns F14 td(clkH-wen) Delay time, output clock GPMC_CLK rising edge to output write enable GPMC_WEn transition div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1; no extra_delay -2.3+I (9) 4.5+I (9) ns F15 td(clkH-do) Delay time, output clock GPMC_CLK rising edge to output data GPMC_AD[15:0] transition (11) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 2.7+J (10) ns F15 td(clkL-do) Delay time, GPMC_CLK falling edge to GPMC_AD[15:0] data bus transition (12) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 2.7+J (10) ns F15 td(clkL-do). Delay time, GPMC_CLK falling edge to GPMC_AD[15:0] data bus transition (13) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 2.7+J (10) ns F17 td(clkH-be[x]n) Delay time, output clock GPMC_CLK rising edge to output lower byte enable and command latch enable GPMC_BE0n_CLE transition (11) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 1.9+J (10) ns F17 td(clkL-be[x]n) Delay time, GPMC_CLK falling edge to GPMC_BE0n_CLE, GPMC_BE1n transition (12) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 1.9+J (10) ns F17 td(clkL-be[x]n). Delay time, GPMC_CLK falling edge to GPMC_BE0n_CLE, GPMC_BE1n transition (13) div_by_1_mode; GPMC_FCLK_MUX_100; TIMEPARAGRANULARITY_X1 -2.3+J (10) 1.9+J (10) ns F18 tw(csnV) Pulse duration, output chip select GPMC_CSn[x] low (14) Read 0+A (1) ns Write 0+A (1) ns F19 tw(be[x]nV) Pulse duration, output lower byte enable and command latch enable GPMC_BE0n_CLE, output upper byte enable GPMC_BE1n low Read 0+C (3) ns Write 0+C (3) ns F20 tw(advnV) Pulse duration, output address valid and address latch enable GPMC_ADVn_ALE low Read 0+K (16) ns Write 0+K (16) ns (1) For single read: A = (CSRdOffTime - CSOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst read: A = (CSRdOffTime - CSOnTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst write: A = (CSWrOffTime - CSOnTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) With n being the page burst access number. (2) B = ClkActivationTime × GPMC_FCLK(17) (3) For single read: C = RdCycleTime × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst read: C = (RdCycleTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst write: C = (WrCycleTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) With n being the page burst access number. (4) For single read: D = (RdCycleTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst read: D = (RdCycleTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst write: D = (WrCycleTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) (5) For single read: E = (CSRdOffTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst read: E = (CSRdOffTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) For burst write: E = (CSWrOffTime - AccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17) (6) For csn falling edge (CS activated): • Case GpmcFCLKDivider = 0: – F = 0.5 × CSExtraDelay × GPMC_FCLK(17) AM6548, AM6528, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 www.ti.com 180 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: AM6548 AM6528 AM6526 |
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