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D301 Datasheet(PDF) 243 Page - Microchip Technology |
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D301 Datasheet(HTML) 243 Page - Microchip Technology |
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243 / 416 page ![]() 2016-2018 Microchip Technology Inc. DS30010118D-page 243 PIC24FJ256GA705 FAMILY REGISTER 20-2: PMCON2: EPMP CONTROL REGISTER 2 HSC/R-0 U-0 HS/R/C-0 HS/R/C-0 U-0 U-0 U-0 U-0 BUSY — ERROR TIMEOUT — — — — bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 RADDR23(1) RADDR22(1) RADDR21(1) RADDR20(1) RADDR19(1) RADDR18(1) RADDR17(1) RADDR16(1) bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown C = Clearable bit HS = Hardware Settable bit HSC = Hardware Settable/Clearable bit bit 15 BUSY: Busy bit (Master mode only) 1 = Port is busy 0 = Port is not busy bit 14 Unimplemented: Read as ‘0’ bit 13 ERROR: Error bit 1 = Transaction error (illegal transaction was requested) 0 = Transaction completed successfully bit 12 TIMEOUT: Time-out bit 1 = Transaction timed out 0 = Transaction completed successfully bit 11-8 Unimplemented: Read as ‘0’ bit 7-0 RADDR<23:16>: Parallel Master Port Reserved Address Space bits(1) Note 1: If RADDR<23:16> = 00000000, then the last EDS address for Chip Select 2 will be FFFFFFh. |
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