3

ICS9248-195

0375D—02/02/04

Byte0: Functionality and Frequency Select Register (default = 0)

Serial Configuration Command Bitmap

Notes:

1, Default at Power-up will be for latched logic inputs to define frequency. Bit [2, 6:4] are default to 0011.

2, PWD = Power-Up Default

The ICS9248-195 is the single chip clock solution for Notebook designs using the 440BX, MX, VIA PM/PL/PLE 133

style chip set, with Coppermine or Tualatin processor, for Note book applications. It provides all necessary clock signals

for such a system.

Spread spectrum may be enabled through I

to 10dB.This simplifies EMI qualification without resorting to board design iterations or costly shielding.The ICS9248-

195 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and

temperature variations.

General Description

Bit

PWD

FS3

Bit2

FS2

Bit6

FS1

Bit5

FS0

Bit4

CPUCLK

PCICLK

Center

Spread %

Down

Spread%

0

0

0

0

66.67

33.33

±0.35%

-0.70%

0

0

0

1

100.00

33.33

±0.35%

-0.70%

0

0

1

0

66.67

33.33

±0.60%

-1.20%

0

0

1

1

133.33

33.33

±0.35%

-0.70%

0

1

0

0

66.67

33.33

±0.23%

-0.45%

0

1

0

1

100.00

33.33

±0.23%

-0.45%

0

1

1

0

100.00

33.33

±0.60%

-1.20%

0

1

1

1

133.33

33.33

±0.23%

-0.45%

1

0

0

0

66.67

33.33

±0.45%

-0.90%

1

0

0

1

100.00

33.33

±0.45%

-0.90%

1

0

1

0

90.00

30.00

±0.35%

-0.70%

1

0

1

1

133.33

33.33

±0.45%

-0.90%

1

1

0

0

70.00

35.00

±0.35%

-0.70%

1

1

0

1

105.00

35.00

±0.35%

-0.70%

1

1

1

0

133.33

33.33

±0.60%

-1.20%

1

1

1

1

140.00

35.00

±0.35%

-0.70%

0 - Normal

Note1

0011

Description

1

0

1

0 = Center Spread Spectrum Modulation

1 = Down Spread Spectrum Modulation

0 - Frequency is selected by hardware select pins. Latched inputs.

1 - Frequency is controlled by I

0 - Running

1 - Tristate all outputs

0

1 - Spread Spectrum Enabled

Bit 0

Bit 7

Bit 3

Bit 2,

6:4

Bit 1