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S-82B2A Datasheet(PDF) 21 Page - ABLIC Inc. |
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S-82B2A Datasheet(HTML) 21 Page - ABLIC Inc. |
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21 / 54 page ![]() BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK Rev.2.2_00 S-82B2A/B Series 21 19. CO pin resistance "H" (Test circuit 4) The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = V2 = 3.4 V, V3 = V6 = 0 V, V4 = 6.4 V. 20. CO pin resistance "L" (Test circuit 4) The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = V2 = 4.9 V, V3 = V6 = 0 V, V4 = 0.4 V. 21. DO pin resistance "H" (Test circuit 4) The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = V2 = 3.4 V, V3 = V6 = 0 V, V5 = 6.4 V. 22. DO pin resistance "L" (Test circuit 4) The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = V2 = 1.8 V, V3 = V6 = 0 V, V5 = 0.4 V. 23. Overcharge detection delay time (Test circuit 5) After setting V1 = V2 = 3.4 V, V3 = V6 = V7 = 0 V, the voltage V1 is increased. The time interval from when the voltage V1 exceeds VCU until VCO goes to "L" is the overcharge detection delay time (tCU). 24. Overdischarge detection delay time (Test circuit 5) After setting V1 = V2 = 3.4 V, V3 = V6 = V7 = 0 V, the voltage V1 is decreased. The time interval from when the voltage V1 falls below VDL until VDO goes to "L" is the overdischarge detection delay time (tDL). 25. Discharge overcurrent n detection delay time (Test circuit 5) After setting V1 = V2 = 3.4 V, V3 = 1.0 V, V6 = V7 = 0 V, the voltage V6 is increased. The time interval from when the voltage V6 exceeds VDIOVn until VDO goes to "L" is the discharge overcurrent n detection delay time (tDIOVn). 26. Load short-circuiting detection delay time (Test circuit 5) After setting V1 = V2 = 3.4 V, V3 = 1.0 V, V6 = V7 = 0 V, the voltage V6 is increased. The time interval from when the voltage V6 exceeds VSHORT until VDO goes to "L" is the load short-circuiting detection delay time (tSHORT). 27. Charge overcurrent detection delay time (Test circuit 5) After setting V1 = V2 = 3.4 V, V3 = V6 = V7 = 0 V, the voltage V6 is decreased. The time interval from when the voltage V6 falls below VCIOV until VCO goes to "L" is the charge overcurrent detection delay time (tCIOV). Remark n = 1, 2 |
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