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STM32U545NET3QTR Datasheet(PDF) 58 Page - STMicroelectronics

Part # STM32U545NET3QTR
Description  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U545NET3QTR Datasheet(HTML) 58 Page - STMicroelectronics

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Functional overview
STM32U545xx
58/283
DS14216 Rev 1
•
ADC features an external analog input channel:
–
Up to 17 channels from dedicated GPIO pads
•
Three additional internal dedicated channels:
–
One channel for internal reference voltage (VREFINT)
–
One channel for internal temperature sensor (VSENSE)
–
One channel for VBAT monitoring channel (VBAT/4)
•
Start-of-conversion can be initiated:
–
by software for both regular and injected conversions
–
by hardware triggers with configurable polarity (internal timers events or GPIO
input events) for both regular and injected conversions
•
Conversion modes
–
Single mode: the ADC converts a single channel. The conversion is triggered by
a special event.
–
Scan mode: the ADC scans and converts a sequence of channels.
–
Continuous mode: the ADC converts continuously selected inputs.
–
Discontinuous mode: the ADC converts a subset of the conversion sequence.
•
Interrupt generation when the ADC is ready, at end of sampling, end of conversion
(regular or injected), end of sequence conversion (regular or injected), analog
watchdog 1, 2 or 3 or when an overrun event occurs
•
Three analog watchdogs
–
Filtering to ignore out-of-range data
•
ADC input range: VSSA < VIN < VREF+
Note:
The ADC1 analog block clock frequency must be between 5 MHz and 55 MHz.
3.25.2
Analog-to-digital converter 4 (ADC4)
The 12-bit ADC4 is a successive approximation analog-to-digital converter. It has up to
21 multiplexed channels allowing it to measure signals from 15 external and six internal
sources. A/D conversion of the various channels can be performed in Single, Continuous,
Scan or Discontinuous mode. The result of the ADC is stored in a left-aligned or
right-aligned 16-bit data register.
The analog watchdog feature allows the application to detect if the input voltage goes
outside the user-defined higher or lower thresholds.
An efficient low-power mode is implemented to allow very low consumption at low
frequency. The ADC4 is autonomous in low-power modes down to Stop 2 mode.
A built-in hardware oversampler allows analog performances to be improved while
off-loading the related computational burden from the CPU.
The ADC4 main features are:
•
High performance
–
12-, 10-, 8- or 6-bit configurable resolution
–
A/D conversion time: 0.4 µs for 12-bit resolution (2.5 MHz), faster conversion
times obtained by lowering resolution
–
Self-calibration
–
Programmable sampling time



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