24CSM01-ESLASHSN datasheet(28/63 Pages) MICROCHIP

28 / 63 page

24CSM01

DS20006781B

-page 28

Preliminary

 2023 Microchip Technology Inc. and its subsidiaries

9.5

Locking the Configuration

The locking mechanism of the Configuration register is

controlled through the LOCK bit. The data of the

confirmation byte depends on the value being written to

the LOCK bit. If the user intends to lock the

Configuration register (LOCK = ‘1’), the confirmation

byte must be 99h. If the user intends to leave the

must be 66h. A mismatch of the LOCK bit and the

confirmation byte will cause the operation to abort.

Refer to Table 9-4 for additional information on the

confirmation byte and the LOCK bit. Figure 9-3

illustrates the Configuration register lock sequence.

FIGURE 9-3:

CONFIGURATION REGISTER LOCK SEQUENCE

Note:

Once the Configuration register has been

locked, it cannot be unlocked.

Note:

Locking the Configuration register cannot

be inhibited by asserting the Write-Protect

pin.

Refer

Section 6.6

“Write

Protection”, which describes the device

behavior with respect to the Write-Protect

pin status.

SCL

MSb

SDA

123

Word Address – Byte 1

Word Address – Byte 0

Device Address Byte

011

A2 A1 x

ACK

from

Client

ACK

from

Client

ACK

from

Client

Start by

Host

MSb

456

CR Lock

Configuration Register

D7 D6 D5 D4 D3 D2 D1 D0 01 0 0

xx D9

ACK

from

Client

ACK

from

Client

ACK

from

Client

Stop by

Host

Confirmation Byte

Byte 1

Byte 0

24CSM01-E/SN Datasheet(PDF) 28 Page - Microchip Technology

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