25CS160-ESLASHST datasheet(15/53 Pages) MICROCHIP

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Preliminary

DS20007008B-page 15

25CS160

4.3

Device Opcodes

4.3.1

SERIAL OPCODE

After the device is selected by driving CS low, the first

byte sent must be the opcode that defines the

sequence to be performed.

The 25CS160 utilizes an 8-bit instruction register. The

list of instructions and their operation codes or opcodes

are contained in Table 4-1. All instructions, addresses

and data are transferred with the MSb first and are

initiated with a high-to-low CS transition.

TABLE 4-1:

INSTRUCTION SET FOR 25CS160

Instruction

Instruction Description

Opcode

Address

Bytes

Data

Bytes

Reference

Section

STATUS Register Instructions

RDSR

Read STATUS Register

05h

0000 0101

01 or 2

6.2

WREN

Set Write Enable Latch (WEL)

06h

0000 0110

5.1

WRDI

Reset Write Enable Latch (WEL)

04h

0000 0100

5.2

WRSR

Write STATUS Register

01h

0000 0001

01 or 2

6.3

EEPROM and Security Register Instructions

READ

Read from EEPROM Array

03h

0000 0011

21+

7.1

WRITE

Write to EEPROM Array (1 to 32 bytes)

02h

0000 0010

21+

8.0

RDEX

Read from the Security Register

83h

1000 0011

21+

9.1

WREX

Write to the Security Register

82h

1000 0010

21+

9.2

LOCK

Lock the Security Register (permanent)

82h

1000 0010

9.2.1

CHLK

Check Lock Status of Security Register

83h

1000 0011

9.2.2

Identification Register Instructions

SPID

Read the SPI Manufacturer ID Data

9Fh

1001 1111

11.1

Undervoltage Lockout Register Instructions

RUVL

Read the Undervoltage Lockout Register

15h

0001 0101

10.2.1

WUVL

Write Undervoltage Lockout Register

11h

0001 0001

10.2.2

Device Reset Instruction

SRST

Software Device Reset

7Ch

0111 1100

1.1.2

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