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ST7232AJ2BC Datasheet(PDF) 96 Page - STMicroelectronics |
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ST7232AJ2BC Datasheet(HTML) 96 Page - STMicroelectronics |
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96 / 157 page  ST7232A 96/157 SERIAL COMMUNICATIONS INTERFACE (Cont’d) 10.5.5 Low Power Modes 10.5.6 Interrupts The SCI interrupt events are connected to the same interrupt vector. These events generate an interrupt if the corre- sponding Enable Control Bit is set and the inter- rupt mask in the CC register is reset (RIM instruc- tion). Mode Description WAIT No effect on SCI. SCI interrupts cause the device to exit from Wait mode. HALT SCI registers are frozen. In Halt mode, the SCI stops transmit- ting/receiving until Halt mode is exit- ed. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt Transmit Data Register Empty TDRE TIE Yes No Transmission Com- plete TC TCIE Yes No Received Data Ready to be Read RDRF RIE Yes No Overrun Error Detected OR Yes No Idle Line Detected IDLE ILIE Yes No Parity Error PE PIE Yes No 1 |
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