74HC_HCT03

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© NXP Semiconductors N.V. 2015. All rights reserved.

Product data sheet

Rev. 4 — 27 November 2015

2 of 14

NXP Semiconductors

74HC03; 74HCT03

Quad 2-input NAND gate; open-drain output

4.

Functional diagram

5.

Pinning information

5.1 Pinning

5.2 Pin description

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one gate)

Fig 4.

Pin configuration SO14

Fig 5.

Pin configuration (T)SSOP14

Table 2.

Pin description

Symbol

Pin

Description

1A to 4A

1, 4, 9, 12

data input

1B to 4B

2, 5, 10, 13

data input

1Y to 4Y

3, 6, 8, 11

data output

GND

7

ground (0 V)

VCC

14

supply voltage