521 datasheet(85/96 Pages) INTEL

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Datasheet

Features

6.1

Power-On Configuration Options

Several configuration options can be configured by hardware. The Pentium 4 processor in the 775-

land package samples the hardware configuration at reset, on the active-to-inactive transition of

RESET#. For specifications on these options, refer to Table 6-1.

The sampled information configures the processor for subsequent operation. These configuration

options cannot be changed except by another reset. All resets reconfigure the processor; for reset

purposes, the processor does not distinguish between a "warm" reset and a "power-on" reset.

Frequency determination functionality will exist on engineering sample processors which means

that samples can run at varied frequencies. Production material will have the bus to core ratio

locked and can only be operated at the rated frequency.

6.2

Clock Control and Low Power States

The processor allows the use of AutoHALT and Stop-Grant states to reduce power consumption by

stopping the clock to internal sections of the processor, depending on each particular state. See

Figure 6-1 for a visual representation of the processor low power states.

The processor adds support for the Enhanced HALT powerdown state. Refer to Figure 6-1 and the

following sections.

Not all processors are capable of supporting the Enhanced HALT state. Refer to the Specification

Update to determine which processor stepping and frequencies will support the Enhanced HALT

state.

Table 6-1. Power-On Configuration Option Signals

Configuration Option

Signal1, 2

NOTES:

Asserting this signal during RESET# will select the corresponding option.

Address signals not identified in this table as configuration options should not be asserted during RESET#.

Output tristate

SMI#

Execute BIST

INIT#

In Order Queue pipelining (set IOQ depth to 1)

A7#

Disable MCERR# observation

A9#

Disable BINIT# observation

A10#

APIC Cluster ID (0-3)

A[12:11]#

Disable bus parking

A15#

Disable Hyper-Threading Technology

A31#

Symmetric agent arbitration ID

BR0#

RESERVED

A[6:3]#, A8#, A[14:13]#, A[16:30]#, A[32:35]#

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