RMLV0416E datasheet(5/15 Pages) RENESAS

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RMLV0416E Series

R10DS0205EJ0100 Rev.1.00

Page 5 of 13

2014.2.27

AC Characteristics

Test Conditions (Vcc = 2.7V ~ 3.6V, Ta = -40 ~ +85°C)

 Input pulse levels: VIL = 0.4V, VIH = 2.4V

 Input rise and fall time: 5ns

 Input and output timing reference level: 1.4V

 Output load: See figures (Including scope and jig)

Read Cycle

Parameter

Symbol

Min.

Max.

Unit

Note

Read cycle time

tRC

Address access time

tAA

─

Chip select access time

tACS1

─

tACS2

─

Output enable to output valid

tOE

─

Output hold from address change

tOH

─

LB#, UB# access time

tBA

─

Chip select to output in low-Z

tCLZ1

─

7,8

tCLZ2

─

7,8

LB#, UB# enable to low-Z

tBLZ

─

7,8

Output enable to output in low-Z

tOLZ

─

7,8

Chip deselect to output in high-Z

tCHZ1

7,8,9

tCHZ2

7,8,9

LB#, UB# disable to high-Z

tBHZ

7,8,9

Output disable to output in high-Z

tOHZ

7,8,9

Note

7. This parameter is sampled and not 100% tested.

8. At any given temperature and voltage condition, tCHZ1 max is less than tCLZ1 min, tCHZ2 max is less than tCLZ2

min, tBHZ max is less than tBLZ min, and tOHZ max is less than tOLZ min, for any device.

9. tCHZ1, tCHZ2, tBHZ and tOHZ are defined as the time when the I/O pins enter a high-impedance state and are not

referred to the I/O levels.

I/O

1.4V

RL = 500 ohm

CL = 30 pF

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