TLH9264

December 1991

TP3401 TP3402 TP3403

DASL Digital Adapter for Subscriber Loops

General Description

The TP3401 TP3402 and TP3403 are complete monolithic

transceivers for data transmission on twisted pair subscriber

loops They are built on National’s double poly microCMOS

Mark Inversion (AMI) line coding in which binary ‘1’s are

alternately transmitted as a positive pulse then a negative

pulse is used to ensure low error rates in the presence of

noise with lower emi radiation than other codes such as Bi-

phase (Manchester)

Full-duplex transmission at 144 kbs is achieved on a single

twisted wire pair using a burst-mode technique (Time Com-

pression Multiplexed) Thus the device operates as an ISDN

‘U’ Interface for short loop applications typically in a PBX

environment providing transmission for 2 B channels and 1

D channel On

24 cable the range is at least 18 km

(6k ft)

System timing is based on a MasterSlave configuration

with the line card end being the Master which controls loop

timing and synchronisation All timing sequences necessary

for loop activation and de-activation are generated on-chip

Selection of Master and Slave mode operation is pro-

grammed via the Microwire Control Interface

A 2048 MHz clock which may be synchronized to the sys-

tem clock controls all transmission-related timing functions

For the TP3401 this clock must be provided from an exter-

nal source the TP3402 includes an oscillator circuit requir-

ing an external crystal The TP3403 includes the functions

of both the TP3401 and the TP3402

Features

Complete ISDN PBX 2-Wire Data Transceiver including

Y

2 B plus D channel interface for PBX U Interface

Y

144 kbs full-duplex on 1 twisted pair using Burst Mode

Y

Loop range up to 6 kft ( 24AWG)

Y

Alternate Mark Inversion coding with transmit filter and

scrambler for low emi radiation

Y

Adaptive line equalizer

Y

On-chip timing recovery no external components

Y

Standard TDM interface for B channels

Y

Separate interface for D channel

Y

2048 MHz master clock

Y

Driver for line transformer

Y

4 loop-back test modes

Y

Y

Y

Applications in

PBX Line Cards

Terminals

Regenerators

Y

Available in both 20-pin DIP and 28-pin PLCC

Block Diagram

TLH9264 – 1

Note 1

TP3401 only

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M115Printed in U S A