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OMAP3530ECUS72 Datasheet(PDF) 64 Page - Texas Instruments

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Part # OMAP3530ECUS72
Description  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECUS72 Datasheet(HTML) 64 Page - Texas Instruments

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OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-2. Ball Characteristics (CBC Pkg.)(1) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
hsusb1_data
3
IO
1
gpio_15
4
IO
mm1_txse0
5
IO
hsusb1_tll_d
6
IO
ata1
hw_dbg3
7
O
AD3
NA
etk_d2
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mcspi3_cs0
1
IO
hsusb1_data
3
IO
2
gpio_16
4
IO
mm1_txdat
5
IO
hsusb1_tll_d
6
IO
ata2
hw_dbg4
7
O
AA3
NA
etk_d3
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mcspi3_clk
1
IO
mmc3_dat3
2
IO
hsusb1_data
3
IO
7
gpio_17
4
IO
hsusb1_tll_d
6
IO
ata7
hw_dbg5
7
O
Y3
NA
etk_d4
0
O
L
L
4
vdds
Yes
4
(20)
PU100/
LVCMOS
PD100
mcbsp5_dr
1
I
mmc3_dat0
2
IO
hsusb1_data
3
IO
4
gpio_18
4
IO
hsusb1_tll_d
6
IO
ata4
hw_dbg6
7
O
AB1
NA
etk_d5
0
O
L
L
4
vdds
Yes
4
(20)
PU100/
LVCMOS
PD100
mcbsp5_fsx
1
IO
mmc3_dat1
2
IO
hsusb1_data
3
IO
5
gpio_19
4
IO
hsusb1_tll_d
6
IO
ata5
hw_dbg7
7
O
AE3
NA
etk_d6
0
O
L
L
4
vdds
Yes
4
(20)
PU100/
LVCMOS
PD100
mcbsp5_dx
1
IO
mmc3_dat2
2
IO
hsusb1_data
3
IO
6
gpio_20
4
IO
hsusb1_tll_d
6
IO
ata6
hw_dbg8
7
O
AD2
NA
etk_d7
0
O
L
L
4
vdds
Yes
4
(20)
PU100/
LVCMOS
PD100
mcspi3_cs1
1
O
(20) The capacity load range is [2 pf to 6 pF].
64
TERMINAL DESCRIPTION
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: OMAP3530 OMAP3525



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