Electronic Components Datasheet Search
  Indian  ▼
ALLDATASHEET.IN

X  

PS8551AL4-AX Datasheet(PDF) 6 Page - California Eastern Labs

Part # PS8551AL4-AX
Description  ANALOG OUTPUT TYPE OPTICAL COUPLED ISOLATION AMPLIFIER
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CEL [California Eastern Labs]
Direct Link  http://www.cel.com
Logo CEL - California Eastern Labs

PS8551AL4-AX Datasheet(HTML) 6 Page - California Eastern Labs

Back Button PS8551AL4-AX Datasheet HTML 2Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 3Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 4Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 5Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 6Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 7Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 8Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 9Page - California Eastern Labs PS8551AL4-AX Datasheet HTML 10Page - California Eastern Labs Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 20 page
background image
PS8551AL4
Chapter Title
R08DS0123EJ0100 Rev.1.00
Page 6 of 18
Jun 27, 2014
ELECTRICAL CHARACTERISTICS (AC Characteristics)
(TYP.: TA = 25
°C, VIN+ = VIN− = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
VOUT Bandwidth (
−3 dB)
fC
VIN+ = 200 mVp-p, sine wave
50
100
kHz
VOUT Noise
NOUT
VIN+ = 0 V
15.6
mVr.m.s.
VIN to VOUT Signal Delay (50 to 10%)
tPD10
VIN+ = 0 to 150 mV step
2.4
3.3
μs
VIN to VOUT Signal Delay (50 to 50%)
tPD50
4.2
5.6
VIN to VOUT Signal Delay (50 to 90%)
tPD90
6.1
9.9
VOUT Rise Time/Fall Time (10 to 90%)
tr/tf
VIN+ = 0 to 150 mV step
3.1
6.6
μs
Common Mode Transient Immunity
*1
CMTI
VCM = 0.5 kV, tr = 20 ns, TA = 25
°C
10
28
kV/
μs
Power Supply Noise Rejection
*2
PSR
f = 1 MHz
40
mVr.m.s.
*1 CMTI is tested by applying a pulse that rises and falls suddenly (VCM = 0.5 kV) between GND1 on the input side
and GND2 on the output side (pins 4 and 5) by using the circuit shown in Fig. 9 CMTI Test Circuit. CMTI is
defined at the point where the differential output voltage (VOUT+
− VOUT−) fluctuates 200 mV (>1
μs) or more from the
average output voltage.
*2 This is the value of the transient voltage at the differential output when 1 Vp-p, 1 MHz, and 40 ns rise/fall time
square wave is applied to both VDD1 and VDD2.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com