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STM8L151C2 Datasheet(PDF) 49 Page - STMicroelectronics

Part # STM8L151C2
Description  Reset and supply management
PDF  122 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8L151C2 Datasheet(HTML) 49 Page - STMicroelectronics

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STM8L151x2, STM8L151x3
Interrupt vector mapping
49
19
TIM2
TIM2 update/overflow/
trigger/break interrupt
-
-
Yes
Yes
0x00 8054
20
TIM2
TIM2 capture/
compare interrupt
-
-
Yes
Yes
0x00 8058
21
TIM3
TIM3 update/overflow/
trigger/break interrupt
-
-
Yes
Yes
0x00 805C
22
TIM3
TIM3 capture/
compare interrupt
-
-
Yes
Yes
0x00 8060
23
RI
RI trigger interrupt
-
-
Yes
-
0x00 8064
24
Reserved
0x00 8068
25
TIM4
TIM4 update/overflow/
trigger interrupt
-
-
Yes
Yes
0x00 806C
26
SPI1
SPI1 TX buffer empty/
RX buffer not empty/
error/wakeup interrupt
Yes
Yes
Yes
Yes
0x00 8070
27
USART1
USART1 transmit data
register empty/
transmission complete
interrupt
-
-
Yes
Yes
0x00 8074
28
USART1
USART1 received data
ready/overrun error/
idle line detected/parity
error/global error interrupt
-
-
Yes
Yes
0x00 8078
29
I2C1
I2C1 interrupt(3)
Yes
Yes
Yes
Yes
0x00 807C
1. The Low power wait mode is entered when executing a WFE instruction in Low power run mode. In WFE mode, the
interrupt is served if it has been previously enabled. After processing the interrupt, the processor goes back to WFE mode.
When the interrupt is configured as a wakeup event, the CPU wakes up and resumes processing.
2. The TLI interrupt is the logic OR between TIM2 overflow interrupt, and TIM4 overflow interrupts.
3. The device is woken up from Halt or Active-halt mode only when the address received matches the interface address.
Table 10. Interrupt mapping (continued)
IRQ
No.
Source
block
Description
Wakeup
from Halt
mode
Wakeup
from
Active-halt
mode
Wakeup
from Wait
(WFI
mode)
Wakeup
from Wait
(WFE
mode)(1)
Vector
address



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