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STM32L471RG Datasheet(PDF) 117 Page - STMicroelectronics |
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STM32L471RG Datasheet(HTML) 117 Page - STMicroelectronics |
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117 / 218 page ![]() DocID027226 Rev 1 117/218 STM32L471xx Electrical characteristics 199 APB1 AHB to APB1 bridge(3) 0.9 0.7 0.9 µA/MHz CAN1 4.6 4.0 4.4 DAC1 2.4 1.9 2.2 I2C1 independent clock domain 3.7 3.1 3.2 I2C1 APB clock domain 1.3 1.1 1.5 I2C2 independent clock domain 3.7 3.0 3.2 I2C2 APB clock domain 1.4 1.1 1.5 I2C3 independent clock domain 2.9 2.3 2.5 I2C3 APB clock domain 0.9 0.9 1.1 LPUART1 independent clock domain 2.1 1.6 2.0 LPUART1 APB clock domain 0.6 0.6 0.6 LPTIM1 independent clock domain 3.3 2.6 2.9 LPTIM1 APB clock domain 0.9 0.8 1.0 LPTIM2 independent clock domain 3.1 2.7 2.9 LPTIM2 APB clock domain 0.8 0.6 0.7 OPAMP 0.4 0.4 0.3 PWR 0.5 0.5 0.4 SPI2 1.8 1.6 1.6 SPI3 2.1 1.7 1.8 SWPMI1 independent clock domain 2.3 1.8 2.2 SWPMI1 APB clock domain 1.1 1.1 1.0 TIM2 6.8 5.7 6.3 TIM3 5.4 4.6 5.0 TIM4 5.2 4.4 4.9 TIM5 6.5 5.5 6.1 TIM6 1.1 1.0 1.0 TIM7 1.1 0.9 1.0 Table 40. Peripheral current consumption (continued) Peripheral Range 1 Range 2 Low-power run and sleep Unit |
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