STM32L471RG datasheet(180/218 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L471xx

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DocID027226 Rev 1

Figure 33. SAI slave timing waveforms

SDMMC characteristics

Unless otherwise specified, the parameters given in Table 86 for SDIO are derived from

tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage

conditions summarized in Table 22: General operating conditions, with the following

configuration:

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load C = 30 pF

•

Measurement points are done at CMOS levels: 0.5 ₓ VDD

Refer to Section 6.3.14: I/O port characteristics for more details on the input/output

characteristics.

Table 86. SD / MMC dynamic characteristics, VDD=2.7 V to 3.6 V(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

Clock frequency in data transfer mode

MHz

SDIO_CK/fPCLK2 frequency ratio

4/3

tW(CKL)

Clock low time

fPP = 50 MHz

tW(CKH)

Clock high time

fPP = 50 MHz

CMD, D inputs (referenced to CK) in MMC and SD HS mode

tISU

Input setup time HS

fPP = 50 MHz

tIH

Input hold time HS

fPP = 50 MHz

4.5

CMD, D outputs (referenced to CK) in MMC and SD HS mode

tOV

Output valid time HS

fPP = 50 MHz

tOH

Output hold time HS

fPP = 50 MHz

CMD, D inputs (referenced to CK) in SD default mode

tISUD

Input setup time SD

fPP = 50 MHz

tIHD

Input hold time SD

fPP = 50 MHz

4.5

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