Features
■ Integrated, ultra low power SRAM, real-time
clock, power-fail control circuit, battery, and
crystal
■ BCD coded year, month, day, date, hours,
minutes, and seconds
■ Automatic power-fail chip deselect and WRITE
protection
■ WRITE protect voltage
VCC = 4.5 to 5.5 V; 4.1 V ≤ VPFD ≤ 4.5 V
(VPFD = power-fail deselect voltage)
■ Conventional SRAM operation; unlimited
WRITE cycles
■ Software-controlled clock calibration for high
accuracy applications
■ 10 years of data retention and clock operation
in the absence of power
■ Self-contained battery and crystal in the DIP
package
■ Pin and function compatible with JEDEC
standard 128 K x 8 SRAMs
■ RoHS compliant
– Lead-free second level interconnect