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GD25Q32CSFG Datasheet(PDF) 61 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25Q32CSFG Datasheet(HTML) 61 Page - GigaDevice Semiconductor (Beijing) Inc. |
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61 / 76 page  3.3V Uniform Sector Dual and Quad Serial Flash GD25Q32C 61 Figure 44. Serial Input Timing Diagram Figure 45. Output Timing Diagram Figure 46. Resume to Suspend Timing Diagram CS# Resume Command tRS Suspend Command Figure 47. Hold Timing Diagram SCLK CS# SI MSB SO High-Z LSB tCHSL tSLCH tDVCH tCHDX tSHCH tCHSH tCHCL tCLCH tSHSL CS# SCLK SO SI Least significant address bit (LIB) in tCLQV tCLQX tCLQX tCLQV tCLH tCLL tSHQZ LSB CS# SCLK SO HOLD# tCHHL tHLQZ tHLCH tCHHH tHHCH tHHQX SI do not care during HOLD operation. |
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