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STM32H753II Datasheet(PDF) 36 Page - STMicroelectronics |
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STM32H753II Datasheet(HTML) 36 Page - STMicroelectronics |
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36 / 361 page  Functional overview STM32H753xI 36/360 DS12117 Rev 8 3.20 Digital-to-analog converters (DAC) The two 12-bit buffered DAC channels can be used to convert two digital signals into two analog voltage signal outputs. This dual digital Interface supports the following features: • two DAC converters: one for each output channel • 8-bit or 12-bit monotonic output • left or right data alignment in 12-bit mode • synchronized update capability • noise-wave generation • triangular-wave generation • dual DAC channel independent or simultaneous conversions • DMA capability for each channel including DMA underrun error detection • external triggers for conversion • input voltage reference VREF+ or internal VREFBUF reference. The DAC channels are triggered through the timer update outputs that are also connected to different DMA streams. 3.21 Ultra-low-power comparators (COMP) STM32H753xI devices embed two rail-to-rail comparators (COMP1 and COMP2). They feature programmable reference voltage (internal or external), hysteresis and speed (low speed for low-power) as well as selectable output polarity. The reference voltage can be one of the following: • An external I/O • A DAC output channel • An internal reference voltage or submultiple (1/4, 1/2, 3/4). All comparators can wake up from Stop mode, generate interrupts and breaks for the timers, and be combined into a window comparator. 3.22 Operational amplifiers (OPAMP) STM32H753xI devices embed two rail-to-rail operational amplifiers (OPAMP1 and OPAMP2) with external or internal follower routing and PGA capability. The operational amplifier main features are: • PGA with a non-inverting gain ranging of 2, 4, 8 or 16 or inverting gain ranging of -1, -3, -7 or -15 • One positive input connected to DAC • Output connected to internal ADC • Low input bias current down to 1 nA • Low input offset voltage down to 1.5 mV • Gain bandwidth up to 7.3 MHz |
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