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STM32F103CBT7TR Datasheet(PDF) 43 Page - STMicroelectronics |
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STM32F103CBT7TR Datasheet(HTML) 43 Page - STMicroelectronics |
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43 / 116 page ![]() DS5319 Rev 18 43/116 STM32F103x8, STM32F103xB Electrical characteristics 115 Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Max(1) Unit TA = 85 °C TA = 105 °C IDD Supply current in Sleep mode External clock(2), all peripherals enabled 72 MHz 30 32 mA 48 MHz 20 20.5 36 MHz 15.5 16 24 MHz 11.5 12 16 MHz 8.5 9 8 MHz 5.5 6 External clock(2), all peripherals disabled 72 MHz 7.5 8 48 MHz 6 6.5 36 MHz 5 5.5 24 MHz 4.5 5 16 MHz 4 4.5 8 MHz 3 4 1. Based on characterization, tested in production at VDD max, fHCLK max with peripherals enabled. 2. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. |
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