DS232BL Version 1.8

© Future Technology Devices Intl. Ltd. 2005

Page 9 of 25

FT232BL USB UART ( USB - Serial) I.C.

POWER CONTROL GROUP

Pin#

Signal

Type

Description

10

SLEEP#

OUT

Goes Low during USB Suspend Mode. Typically used to power-down an external

TTL to RS232 level converter i.c. in USB <=> RS232 converter designs.

15

PWREN#

OUT

Goes Low after the device is configured via USB, then high during USB suspend.

Can be used to control power to external logic using a P-Channel Logic Level

MOSFET switch. Enable the Interface Pull-Down Option in EEPROM when using

the PWREN# pin in this way.

14

PWRCTL

IN

Bus Powered – Tie Low / Self Powered – Tie High (to VCCIO)

MISCELLANEOUS SIGNAL GROUP

Pin#

Signal

Type

Description

4

RESET#

IN

Can be used by an external device to reset the FT232BL. If not required, tie to

VCC.

5

RSTOUT#

OUT

Output of the internal Reset Generator. Stays high impedance for ~ 5ms after

VCC > 3.5V and the internal clock starts up, then clamps its output to the 3.3v

output of the internal regulator. Taking RESET# low will also force RSTOUT# to

drive low. RSTOUT# is NOT affected by a USB Bus Reset.

12

TXLED#

O.C.

LED Drive - Pulses Low when Transmitting Data via USB

11

RXLED#

O.C.

LED Drive - Pulses Low when Receiving Data via USB

27

XTIN

IN

Input to 6MHz Crystal Oscillator Cell. This pin can also be driven by an external

6MHz clock if required. Note : Switching threshold of this pin is VCC/2, so if

driving from an external source, the source must be driving at 5V CMOS level or

a.c. coupled to centre around VCC/2.

28

XTOUT

OUT

Output from 6MHz Crystal Oscillator Cell. XTOUT stops oscillating during USB

suspend, so take care if using this signal to clock external logic.

31

TEST

IN

Puts device in I.C. test mode – must be tied to GND for normal operation.

POWER AND GND GROUP

Pin#

Signal

Type

Description

6

3V3OUT

OUT

3.3 volt Output from the integrated L.D.O. regulator This pin should be decoupled

to GND using a 33nF ceramic capacitor in close proximity to the device pin. Its

prime purpose is to provide the internal 3.3V supply to the USB transceiver cell

and the RSTOUT# pin. A small amount of current (<= 5mA) can be drawn from

this pin to power external 3.3v logic if required.

3,26

VCC

PWR

+4.35 volt to +5.25 volt VCC to the device core, LDO and non-UART interface

pins.

13

VCCIO

PWR

+3.0 volt to +5.25 volt VCC to the UART interface pins 10..12, 14..16 and 18..25.

When interfacing with 3.3V external logic in a bus powered design connect

VCCIO to a 3.3V supply generated from the USB bus. When interfacing with

3.3V external logic in a self powered design connect VCCIO to the 3.3V supply

of the external logic. Otherwise connect to VCC to drive out at 5V CMOS level.

9,17

GND

PWR

Device - Ground Supply Pins

30

AVCC

PWR

Device - Analog Power Supply for the internal x8 clock multiplier

29

AGND

PWR

Device - Analog Ground Supply for the internal x8 clock multiplier