4.4

Enable

The L99VR02J is enabled/disabled by the enable input; a high voltage signal switches the regulator ON. When

the enable pin is set low, the output is switched-off. The current consumption of the device becomes as low as 1

μA and the fast output discharge circuit is activated.

It may happen that the components drive the enable pin supplied at a voltage different from the regulator supply

voltage. In this case, the EN input pin must be set high only once VS > 1.5 V. A solution to drive the enable pin is

depicted in the Figure 36.

Figure 36. Typical example of enable control

In any case, to avoid exceeding the absolute maximum rating, a special care must be adopted in driving the EN

pin since the enable input voltage is linked to the maximum DC supply voltage (VS) applied to the L99VR02J

(-0.3 V to VS + 0.3 V).

4.5

Reset

The reset circuit supervises the output voltage VO. If the output voltage falls below VO_th, then RST is pulled low

with a reaction time Trr. When the output voltage rises above, VO_th+ VO_th_hyst then RST is pulled high with a

delay time Trd. An internal circuit generates the delay. The reset circuit is active when EN is high. Being RST

an open-drain output an external resistance (Rrst) is needed between the RST pin and the VO pin. The external

resistance value can be in a range between 4.7 KΩ and 20 KΩ. Leave the RST pin floating if not used. Be aware

that the current flowing through the RST pin drawn from VO when the RST pin is pulled low. It may affect the

watchdog activation/deactivation based on the regulator output current consumption monitoring.

Figure 37. Reset timing diagram

L99VR02J

Enable

DS14076 - Rev 1

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