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L9341 Datasheet(PDF) 5 Page - STMicroelectronics |
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L9341 Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 10 page ![]() MSB 14 13 12 11 3 2 1 LSB MSB 14 13 12 11 3 2 1 LSB SCLK SDI SDO CS SCLK SDI SDO tclcl tchcl tch tcl tclch tchch t su th t d t clz t oh t zch 15 14 0 0 15 CS Figure 4: Synchronous Serial Interface Protocol. fclock Clock Frequency min. DC max. 2MHz tch Width of Clock Input High Puls min. 200ns tcl Widh of Clock Input Low Puls min. 200ns tcicl Clock Low Before CS Low min. 200ns tchcl Clock High After CS Low min. 200ns tclch Clock Low Before CS High min. 200ns tchch Clock High After CS High min. 200ns tciz SDO Low-Z CS Low min. 0ns max. 400ns tzch SDO High-Z CS High max. 400ns tsu SDI Input Setup Time min. 80ns th SDI Input Hold Time min. 80ns td SDO Output Delay Time (CL = 50pF) max. 100ns toh SDO Output Hold Time min. 0ns L9341 5/10 |
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