5 / 9 page
CY2DP814
Document #: 38-07060 Rev. *E
Page 5 of 9
Figure 2. Differential PECL Output
Figure 3. Differential Receiver to Driver Propagation Delay and Driver Transition Time[3, 4, 5, 6, 7]
Notes
3. RL = 50 ohm
± 1%; Zline = 50 ohm 6 = Ó.
4. CL includes instrumentation and fixture capacitance within 6 mm of the UT.
5. TPA and B are used for prop delay and rise/fall measurements. TPC is used for VOC measurements only and otherwise connected to VDD – 2.
6. When measuring Tr/Tf, tpd, VOD point TPC is held at VDD – 2.0V.
7. LVCMOS/LVTTL single-ended input value. Ground either input: when on the B side, non-inversion takes place. If A side is grounded, the signal becomes the complement
of the input on B side. See Table 3.
Table 10. High-frequency Parametrics
Parameter
Description
Conditions
Min
Typ
Max
Unit
Fmax
Maximum Frequency
VDD = 3.3V
50% Duty Cycle tW(50–50)
Standard Load Circuit
450
MHz
Fmax(20)
Maximum Frequency
VDD = 3.3V
20% Duty Cycle tW(20–80)
LVPECL Input
Vin = VIH(Max.)/VIL(Min.)
Vout = VOH(Min.)/VOL (Max.) (Limit)
175
MHz
TW
Minimum Pulse
VDD = 3.3V
LVPECL Input
Vin = VIH(Max.)/VIL(Min.) F = 100 MHz
Vout = VOH(Min.)/VOL(Max.).(Limit)
900
ps
Q
Q
VDD
VDD - 2V
Device concept
User Defined
VTT & RTT
80%
20%
0V D if f e rentia l
V0 Y -
V0 Z
t
R
t
F
1.4 V
1.0 V
1.4 V
1.0 V
0V D if f e rentia l
0V D if f e rentia l
1.2 V C M
1.2 V C M
V1A
V1B
V0Y
V0Z
T PL H
T PH L
En1
En2
TPA
TPC
TPB
50
50
GND
150
150
Standard Term ination
Pulse
G enerator
A
B
10pF
VDD-2V
[+] Feedback
[+] Feedback
[+] Feedback
Indian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
