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CLC1603 Datasheet(PDF) 16 Page - Cadeka Microcircuits LLC.

Part # CLC1603
Description  Single and Triple, 1.1mA, 200MHz Amplifiers
PDF  22 Pages
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Manufacturer  CADEKA [Cadeka Microcircuits LLC.]
Direct Link  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CLC1603 Datasheet(HTML) 16 Page - Cadeka Microcircuits LLC.

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Data Sheet
©2007-2008 CADEKA Microcircuits LLC
www.cadeka.com
16
Driving Capacitive Loads
Increased phase delay at the output due to capacitive load-
ing can cause ringing, peaking in the frequency response,
and possible unstable behavior. Use a series resistance,
RS, between the amplifier and the load to help improve
stability and settling performance. Refer to Figure 6.
Figure 6. Addition of RS for Driving
Capacitive Loads
Table 2 provides the recommended RS for various capaci-
tive loads. The recommended RS values result in <=0.5dB
peaking in the frequency response. The Frequency Re-
sponse vs. CL plot, on pages 9 and 10, illustrate the re-
sponse of the CLCx603 Family.
CL (pF)
RS (Ω)
-3dB BW (MHz)
10
40
350
50
20
200
100
15
140
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of ad-
ditional overshoot and ringing.
Parasitic Capacitance on the Inverting Input
Physical connections between components create unin-
tentional or parasitic resistive, capacitive, and inductive
elements.
Parasitic capacitance at the inverting input can be espe-
cially troublesome with high frequency amplifiers. A para-
sitic capacitance on this node will be in parallel with the
gain setting resistor Rg. At high frequencies, its imped-
ance can begin to raise the system gain by making Rg
appear smaller.
In general, avoid adding any additional parasitic capaci-
tance at this node. In addition, stray capacitance across
the Rf resistor can induce peaking and high frequency
ringing. Refer to the layout considerations section for
additional information regarding high speed layout tech-
niques.
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified volt-
age range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.
The recovery time varies, based on whether the input or
output is overdriven and by how much the range is ex-
ceeded. The CLCx603 Family will typically recover in less
than 30ns from an overdrive condition. Figure 7 shows the
CLC1603 in an overdriven condition.
Figure 7. Overdrive Recovery
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 100 ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
perature, the package thermal resistance value ThetaJA
JA) is used along with the total die power dissipation.
TJunction = TAmbient + (ӨJA × PD)
Where TAmbient is the temperature of the working environment.
+
-
Rf
Input
Output
Rg
Rs
CL
RL
-5
-4
-3
-2
-1
0
1
2
3
4
5
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
0
20
40
60
80
100 120 140 160 180 200
Time (ns)
Output
Input
VIN = 1.5Vpp
G = 5



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