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MPC5643LF0MLQ8 Datasheet(PDF) 74 Page - Freescale Semiconductor, Inc

Part # MPC5643LF0MLQ8
Description  MPC5643L Microcontroller Data Sheet
PDF  98 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5643LF0MLQ8 Datasheet(HTML) 74 Page - Freescale Semiconductor, Inc

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MPC5643L Microcontroller Data Sheet, Rev. 3
Preliminary—Subject to Change Without Notice
Electrical characteristics
Freescale Semiconductor
74
Figure 23. Transient Behavior during Sampling Phase
In particular two different transient periods can be distinguished:
A first and quick charge transfer from the internal capacitance CP1 and CP2 to the sampling capacitance CS occurs (CS
is supposed initially completely discharged): considering a worst case (since the time constant in reality would be
faster) in which CP2 is reported in parallel to CP1 (call CP = CP1 + CP2), the two capacitances CP and CS are in series,
and the time constant is
Eqn. 8
Equation 8 can again be simplified considering only CS as an additional worst condition. In reality,
the transient is faster, but the A/D converter circuitry has been designed to be robust also in the
very worst case: the sampling time TS is always much longer than the internal time constant:
Eqn. 9
The charge of CP1 and CP2 is redistributed also on CS, determining a new value of the voltage VA1
on the capacitance according to Equation 10:
Eqn. 10
A second charge transfer involves also CF (that is typically bigger than the on-chip capacitance) through the resistance
RL: again considering the worst case in which CP2 and CS were in parallel to CP1 (since the time constant in reality
would be faster), the time constant is:
Eqn. 11
In this case, the time constant depends on the external circuit: in particular imposing that the
transient is completed well before the end of sampling time TS, a constraints on RL sizing is
obtained:
VA
VA1
VA2
t
TS
VCS
Voltage Transient on CS
ΔV < 0.5 LSB
1
2
τ
1 < (RSW + RAD) CS << TS
τ
2 = RL (CS + CP1 + CP2)
τ
1
R
SW
R
AD
+
()
=
C
P
C
S
C
P
C
S
+
---------------------
τ
1
R
SW
R
AD
+
()
<
C
S
T
S
«
V
A1
C
S
C
P1
C
P2
++
()
V
A
C
P1
C
P2
+
()
=
τ
2
R
L
<
C
S
C
P1
C
P2
++
()



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