SPST Non-Reflective AlGaAs PIN Diode Switch

V5

MA4AGSW1A

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Data Sheets contain information regarding a product M/A-COM Technology Solutions

is considering for development. Performance is based on target specifications, simulated results,

and/or prototype measurements. Commitment to develop is not guaranteed.

PRELIMINARY:

Data Sheets contain information regarding a product M/A-COM Technology

Solutions has under development. Performance is based on engineering tests. Specifications are

typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available.

Commitment to produce in volume is not guaranteed.

5

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MA4AGSW1A Schematic with Bias Network for 10-30Ghz

Operation of the MA4AGSW1A Switch

An external bias network and D.C return is required for successful operation of the MA4AGSW1A absorptive

SPST AlGaAs PIN diode switch. The backside area of the die is the RF and D.C. ground return plane. In the

low loss state, the series diode is forward biased with negative current at D.C. Bias 1 and the match diode is

biased at 0V at D.C. Bias B. In the isolated state, the shunt diode and the match diode are both forward biased

at D.C. Bias B1 and D.C. Bias B (series diode becomes reverse biased ). This isolation state bias results in a

good 50Ω match into Port J2. Typical driver connections are shown in Table I below. The bias network design

shown in the schematic should yield > 30dB RF to DC isolation.

TYPICAL DRIVER CONNECTIONS

J1-J2 Low Loss : Good VSWR at J1 & J2

D.C. Bias 1 = -10mA

D.C. Bias 1 = +10mA

D.C. Bias B = 0V

D.C. Bias B = +10mA

J1-J2 Isolation : Good VSWR at J2

Notes:

1.

D.C. Bias 1 and D.C. Bias B nodes can be connected together.

2.

Diode junction forward bias voltage, Δ Vf @ 10 mA ~ 1.35 V @ + 25° C.

10 pF

DC Bias

4.7 nH

10 pF

MA4AGSW1A Chip

B1

DC and RF ground return

on backside of chip

Matching

diode bias

MA4AGSW1A Chip

10 pF