AMC1200STDUBRQ1 datasheet(5/23 Pages) TI1

5 / 23 page

AMC1200-Q1

www.ti.com

SBAS585 – SEPTEMBER 2012

PACKAGE CHARACTERISTICS

(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Shortest terminal-to-terminal distance

L(I01)

Minimum air gap (clearance)

through air

Shortest terminal-to-terminal distance

L(I02)

Minimum external tracking (creepage)

across the package surface

Tracking resistance

CTI

DIN IEC 60112/VDE 0303 part 1

≥ 175

(comparative tracking index)

Minimum internal gap

Distance through the insulation

0.014

(internal clearance)

Input to output, VIO = 500 V, all pins on

each side of the barrier tied together to

> 1012

Ω

create a two-terminal device, TA < 85°C

RIO

Isolation resistance

Input to output, VIO = 500 V,

> 1011

Ω

85°C

≤ TA < TA max

CIO

Barrier capacitance input to output

VI = 0.5 VPP at 1 MHz

1.2

Input capacitance to ground

VI = 0.5 VPP at 1 MHz

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of a specific

application. Care should be taken to maintain the creepage and clearance distance of the board design to ensure that the mounting

pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal

according to the measurement techniques shown in the Isolation Glossary section. Techniques such as inserting grooves and/or ribs on

the PCB are used to help increase these specifications.

ELECTRICAL CHARACTERISTICS

All minimum/maximum specifications at TA = –40°C to 105°C and within the specified voltage range, unless otherwise noted.

Typical values are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V.

AMC1200-Q1

PARAMETER

UNIT

TEST CONDITIONS

MIN

TYP

MAX

INPUT

Maximum input voltage before

VINP – VINN

±320

clipping

Differential input voltage

VINP – VINN

–250

250

VCM

Common-mode operating range

–0.16

VDD1

VOS

Input offset voltage

–1.5

±0.2

1.5

TCVOS

Input offset thermal drift

–10

±1.5

µV/K

VIN from 0 V to 5 V at 0 Hz

108

CMRR

Common-mode rejection ratio

VIN from 0 V to 5 V at 50 kHz

CIN

Input capacitance to GND1

VINP or VINN

CIND

Differential input capacitance

3.6

RIN

Differential input resistance

Ω

Small-signal bandwidth

100

kHz

OUTPUT

Nominal gain

Initial, at TA = 25°C

–0.5%

±0.05%

0.5%

GERR

Gain error

–1%

±0.05%

TCGERR

Gain error thermal drift

±56

ppm/K

4.5 V

≤ VDD2 ≤ 5.5 V

–0.075%

±0.015%

0.075%

Nonlinearity

2.7 V

≤ VDD2 ≤ 3.6 V

–0.1%

±0.023%

0.1%

Nonlinearity thermal drift

2.4

ppm/K

Output noise

VINP = VINN = 0 V

3.1

mVRMS

vs VDD1, 10-kHz ripple

PSRR

Power-supply rejection ratio

vs VDD2, 10-kHz ripple

Rise/fall time

0.5-V step, 10% to 90%

3.66

6.6

µs

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