STM8L152M8 datasheet(96/134 Pages) STMICROELECTRONICS

96 / 134 page

Electrical parameters

STM8L15xx8, STM8L15xR6

96/134

DocID17943 Rev 6

Table 38. I/O static characteristics

Symbol

Parameter

Conditions(1)

Min.

Typ.

Max.

Unit

VIL

Input low level voltage(2)

Input voltage on true

open-drain pins (PC0

and PC1)

Vss-0.3

0.3 x VDD

Input voltage on five-

volt tolerant (FT) pins

Vss-0.3

0.3 x VDD

Input voltage on any

other pin

Vss-0.3

0.3 x VDD

VIH

Input high level voltage (2)

Input voltage on true

open-drain pins (PC0

and PC1)

with VDD < 2 V

0.70 x VDD

5.2

Input voltage on true

open-drain pins (PC0

and PC1)

with VDD ≥ 2 V

5.5

Input voltage on five-

volt tolerant (FT) pins

with VDD < 2 V

0.70 x VDD

5.2

Input voltage on five-

volt tolerant (FT) pins

with VDD ≥ 2 V

5.5

Input voltage on any

other pin

0.70 x VDD

VDD+0.3

Vhys

Schmitt trigger voltage hysteresis (3)

Standard I/Os

200

True open drain I/Os

200

Ilkg

Input leakage current (4)

VSS≤VIN≤VDD

Standard I/Os

50 (5)

VSS≤VIN≤VDD

True open drain I/Os

200(5)

VSS≤VIN≤VDD

PA0 with high sink LED

driver capability

200(5)

RPU

Weak pull-up equivalent

resistor(2)(6)

VIN=VSS

CIO

I/O pin capacitance

1. VDD = 3.0 V, TA = -40 to 125 °C unless otherwise specified.

2. Data based on characterization results, not tested in production.

3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

4. The max. value may be exceeded if negative current is injected on adjacent pins.

5. Not tested in production.

6. RPU pull-up equivalent resistor based on a resistive transistor (corresponding IPU current characteristics described in

Figure 28).

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