| Electronic Components Datasheet Search |
|
M24M02-DWMN3TP Datasheet(PDF) 17 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M24M02-DWMN3TP Datasheet(HTML) 17 Page - STMicroelectronics |
|
17 / 38 page ![]() DocID027947 Rev 2 17/38 M24M02-A125 Instructions 37 4.1.2 Page Write The Page Write mode allows up to N(1) bytes to be written in a single Write cycle, provided that they are all located in the same page in the memory: that is, the most significant memory address bits, A17/A8, are the same. If more bytes are sent than will fit up to the end of the page, a condition known as “roll-over” occurs. In case of roll-over, the first bytes of the page are overwritten. The bus master sends from 1 to N(1) bytes of data, each of which is acknowledged by the device if Write Control (WC) is low. If Write Control (WC) is high, the contents of the addressed memory location are not modified, and each data byte received by the device is not acknowledged, as shown in Figure 6. After each byte is transferred, the internal byte address counter is incremented. The transfer is terminated by the bus master generating a Stop condition. Figure 6. Write mode sequences with WC = 1 (data write inhibited) 1. N is the number of bytes in a page. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |