LNBP8L datasheet(4/21 Pages) STMICROELECTRONICS

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Pin configuration

LNBP8L - LNBP9L - LNBP10L - LNBP11L

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Pin configuration

Figure 2.

Pin connections (top view for IPPAK, bottom view for DFN8)

DFN8 (5x6 mm)

IPPAK

Table 1.

Pin description

Pin n° (DFN)

LNBP10/11L

Pin n°

(IPPAK)

LNBP8/9L

Name

Pin function

VCC1

(not available for

IPPAK)

Supply input 1: 15 V to 25 V supply. For DFN package it is

automatically selected when VOUT = 13 V. For IPPAK package

VCC1 and VCC2 are internally connected together to pin 1 to be

supplied at 22 V min.

VCC2

(VCC pin for

IPPAK)

Supply input 2: 22 V to 25 V supply. For DFN package it is

automatically selected when VOUT = 18 V. For IPPAK package

VCC1 and VCC2 are internally connected together to the pin 1 to be

supplied at 22 V min.

OUTPUT

Output: regulator output. It is 13 V typ when EN/VSEL LOW and

18 V typ when EN/VSEL HIGH.

4, ePAD

3, ePAD

GROUND

EN/VSEL

Enable and output voltage selection 3-state pin: logic control

input 3-state pin for the remote controlling of the LNB; if LOW

VOUT = 13 V, when HIGH VOUT = 18 V, if left at high impedance the

IC is set in shut down mode (VOUT = 0 V)

EXTM/TEN

Tone enable (LNBP9-11): logic control input to enable internal

tone generator.

External modulation (LNBP8-10): Needs DC decoupling to the

AC source. If not used can be left floating.

LLC

LLC: logic control input to add 1 V typ.

7NA

CEXT

CEXT: timing capacitor used by the dynamic overload protection.

Typical application is 4.7 µF for a 1100 ms cycle

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