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AM6548BACDXEAF Datasheet(PDF) 205 Page - Texas Instruments

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Part # AM6548BACDXEAF
Description  AM654x, AM652x Sitara??Processors Silicon Revision 2.1
PDF  282 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM6548BACDXEAF Datasheet(HTML) 205 Page - Texas Instruments

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ASP15
ASP14
ASP13
ASP13
ASP12
ASP12
ASP11
ASP10
ASP10
ASP9
A0
A1
B0
B1
A30 A31
B30 B31 C0
C1 C2 C3
C31
ASP13
ASP13
ASP13
ASP13
ASP13
MCASP[x]_ACLKR/X (Falling Edge Polarity)
MCASP[x]_AHCLKR/X (Rising Edge Polarity)
MCASP[x]_AFSR/X (Bit Width, 0 Bit Delay)
MCASP[x]_AFSR/X (Bit Width, 1 Bit Delay)
MCASP[x]_AFSR/X (Bit Width, 2 Bit Delay)
MCASP[x]_AFSR/X (Slot Width, 0 Bit Delay)
MCASP[x]_AFSR/X (Slot Width, 1 Bit Delay)
MCASP[x]_AFSR/X (Slot Width, 2 Bit Delay)
MCASP[x]_AXR[x] (Data Out/Transmit)
MCASP[x]_ACLKR/X (CLKRP = CLKXP = 1)
(A)
MCASP[x]_ACLKR/X (CLKRP = CLKXP = 0)
(B)
A.
For CLKRP = CLKXP = 1, the MCASP transmitter is configured for falling edge (to shift data out) and the MCASP receiver is configured
for rising edge (to shift data in).
B.
For CLKRP = CLKXP = 0, the MCASP transmitter is configured for rising edge (to shift data out) and the MCASP receiver is configured
for falling edge (to shift data in).
Figure 7-67. MCASP Output Timing
For more information, see section Controller Area Network (MCAN) in the device TRM.
7.9.5.15 MCSPI
For more details about features and additional description information on the device Serial Port Interface, see
the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description.
Table 7-46 presents the timing conditions of SPI.
Table 7-46. SPI Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
2
8.5
V/ns
OUTPUT CONDITIONS
www.ti.com
AM6548, AM6528, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: AM6548 AM6528 AM6526



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