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CS5467 Datasheet(PDF) 21 Page - Cirrus Logic

Part # CS5467
Description  Four-channel Power/Energy IC
PDF  46 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5467 Datasheet(HTML) 21 Page - Cirrus Logic

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CS5467
DS714A1
21
ADVANCE RELEASE
adding 2.737649x10-4 to the Temperature Offset Regis-
ter
(Toff). Therefore,
if Toff = -0.094488 and ∆T = -2.0 (°C), then
or 0xF3D5BB (2’s compliment notation) is stored in the
Temperature Offset Register
(Toff).
To convert the Temperature Register (T) from a Celsius
scale (°C) to a Fahrenheit scale (°F) utilize the formula
Applying the above relationship to the CS5461A tem-
perature measurement algorithm
If Toff = -0.09504 and Tgain = 26.443 for a Celsius scale,
the modified values are Toff = -0.09017 (0xF47550) and
Tgain = 47.6 (0x5F3333) for a Fahrenheit scale.
5.8 Voltage Reference
The CS5467 is specified for operation with a +2.5 V ref-
erence between the VREFIN and AGND pins. To utilize
the on-chip 2.5 V reference, connect the VREFOUT pin
to the VREFIN pin of the device. The VREFIN can be
used to connect external filtering and/or references.
5.9 System Initialization
Upon powering up, the digital circuitry is held in reset
until the analog voltage reaches 4.0 V. At that time, an
eight-XIN-clock-period delay is enabled to allow the os-
cillator to stabilize. The CS5467 will then initialize.
A hardware reset is initiated when the RESET pin is as-
serted with a minimum pulse width of 50 ns. The RE-
SET signal is asynchronous, with a Schmitt-trigger
input. Once the RESET pin is de-asserted, an
eight-XIN-clock-period delay is enabled.
A software reset is initiated by writing the command
0x80. After a hardware or software reset, the internal
registers (some of which drive output pins) will be reset
to their default values. Status bit DRDY in the Status
Register,
indicates the CS5467 is in its active state and
ready to receive commands.
5.10 Power-down States
The CS5467 has two power-down states, Stand-by and
Sleep
. In the stand-by state all circuitry except the volt-
age reference and crystal oscillator is turned off. To re-
turn the device to the active state, a power-up command
is sent to the device.
In Sleep state, all circuitry except the instruction decod-
er is turned off. When the power-up command is sent to
the device, a system initialization is performed (See
Section 5.9 System Initialization on page 21).
5.11 Oscillator Characteristics
XIN and XOUT are the input and output of an inverting
amplifier configured as an on-chip oscillator, as shown
in Figure 11. The oscillator circuit is designed to work
with a quartz crystal. To reduce circuit cost, two load ca-
pacitors C1 and C2 are integrated in the device, from
XIN to DGND, and XOUT to DGND. PCB trace lengths
should be minimized to reduce stray capacitance. To
drive the device from an external clock source, XOUT
should be left unconnected while XIN is driven by the
external circuitry. There is an amplifier between XIN and
the digital section which provides CMOS level signals.
This amplifier works with sinusoidal inputs so there are
no problems with slow edge times.
The CS5467 can be driven by an external oscillator
ranging from 2.5 to 20 MHz, but the K divider value must
be set such that the internal MCLK will run somewhere
between 2.5 MHz and 5 MHz. The K divider value is set
with the K[3:0] bits in the Configuration Register. As an
example, if XIN = MCLK = 15 MHz, and K is set to 5,
DCLK will equal 3 MHz, which is a valid value for DCLK.
5.12 Event Handler
The INT pin is used to indicate that an internal error or
event has taken place in the CS5467. Writing a logic 1
T
off
T
off
T 2.737649 10
4
×
()
+
=
T
off
0.094488
2.0
2.737649
10
4
×
()
+
()
0.09504
==
F
o
9
5
---C
o
17.7778
+
()
=
TF
o
〈〉
9
5
--- T
gain
×
⎝⎠
⎛⎞ TC
o
〈〉
T
off
17.7778
2.737649
×
10
4
()
+
⎝⎠
⎛⎞
+
=
Oscillator
Circuit
DGND
XIN
XOUT
C1
C1 =
22 pF
C2
C2 =
Figure 11. Oscillator Connection



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