WM8987LGECOSLASHRV datasheet(21/58 Pages) WOLFSON

21 / 58 page

Pre-Production

WM8987L

PP Rev 3.0 January 2007

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

6:5

ADCPOL

[1:0]

00 = Polarity not inverted

01 = L polarity invert

10 = R polarity invert

11 = L and R polarity invert

HPOR

Store dc offset when high-pass

filter disabled

1 = store offset

0 = clear offset

ADC high-pass filter enable

(Digital)

HPFLREN = 0

1 = Disable high-pass filter on left

and right channels

0 = Enable high-pass filter on left

and right channels

R5 (05h)

ADC and DAC

Control

ADCHPD

HPFLREN = 1

0 = High-pass enabled on left,

disabled on right

1 = High-pass enabled on right,

disabled on left

R27 (1Bh)

HPFLREN

ADC high-pass filter left or right

enable

0 = High-pass filter enable/disable

on left and right channels

controlled by ADCHPD

1 = High-pass filter enabled on left

or right channel, as selected by

ADCHPD

Table 10 ADC Signal Path Control

HPFLREN

ADCHPD

HIGH PASS MODE

High-pass filter enabled on left and right

channels

High-pass filter disabled on left and right

channels

High-pass filter enabled on left channel,

disabled on right channel

High-pass filter disabled on left channel,

enabled on right channel

Table 11 ADC High Pass Filter Enable Modes

WM8987LGECO/RV Datasheet(PDF) 21 Page - Wolfson Microelectronics plc

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