ADL5375-05ACPZ-R71 datasheet(28/32 Pages) AD

28 / 32 page

ADL5375

Rev. 0 | Page 28 of 32

Figure 71. Evaluation Board Layout, Top Layer

Figure 72. Evaluation Board Layout, Bottom Layer

THERMAL GROUNDING AND EVALUATION

BOARD LAYOUT

The package for the ADL5375 features an exposed paddle on

the underside that should be well soldered to a low thermal

and electrical impedance ground plane. This paddle is typically

soldered to an exposed opening in the solder mask on the

evaluation board. Figure 73 illustrates the dimensions used

in the layout of the ADL5735 footprint on the ADL5375

evaluation board (1 mil. = 0.0254 mm).

Notice the use of nine via holes on the exposed paddle. These

ground vias should be connected to all other ground layers on

the evaluation board to maximize heat dissipation from the

device package.

82 mil.

12 mil.

23 mil.

133.8 mil.

98.4 mil.

19.7 mil.

25 mil.

Figure 73. Dimensions for Evaluation Board Layout for the ADL5375 Package

Under these conditions, the thermal impedance of the ADL5375

was measured to be approximately 30°C/W in still air.

ADL5375-05ACPZ-R71 Datasheet(PDF) 28 Page - Analog Devices