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LTM8031

8031fa

PIN FUNCTIONS

SYNC (Pin L6): This is the external clock synchronization

input. Ground this pin for low ripple Burst Mode

® operation

at low output loads. Tie to a stable voltage source greater

than 0.7V to disable Burst Mode operation. Do not leave

this pin ﬂoating. Tie to a clock source for synchroniza-

tion. Clock edges should have rise and fall times faster

than 1μs. See Synchronization section in Applications

Information.

PGOOD (Pin K7): The PGOOD pin is the open-collector

output of an internal comparator. PGOOD remains low until

the ADJ pin is within 10% of the ﬁnal regulation voltage.

The PGOOD output is valid when VIN is above 3.6V and

RUN/SS is high. If this function is not used, leave this

pin ﬂoating.

ADJ (Pin J7): The LTM8031 regulates its ADJ pin to 0.79V.

Connect the adjust resistor from this pin to ground. The

value of RADJ is given by the equation:

ADJ

OUT

196 71

079

–.

where RADJ is in kΩ.

BLOCK DIAGRAM

CURRENT

MODE

CONTROLLER

249k

10μF

VOUT

AUX

GND

4.7μH

BIAS

22pF

EMI FILTER

FIN

VIN

GND

SYNC

PGOOD

ADJ

8031 BD

RUN/SS

Burst Mode is a registered trademark of Linear Technology Corporation.

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