PIC16F628-20SLASHSS datasheet(22/160 Pages) MICROCHIP

22 / 160 page

PIC16F62X

DS40300B-page 22

Preliminary

4.2.2.4

PIE1 REGISTER

This register contains interrupt enable bits.

PIE1 REGISTER (ADDRESS 8CH)

R/W-0

EEIE

CMIE

RCIE

TXIE

CCP1IE

TMR2IE TMR1IE

R = Readable bit

W = Writable bit

U = Unimplemented bit, read

as ’0’

-n = Value at POR reset

bit7

bit0

bit 7:

EEIE: EE Write Complete Interrupt Enable Bit

= Enables the EE write complete interrupt

= Disables the EE write complete interrupt

bit 6:

CMIE: Comparator Interrupt Enable bit

= Enables the comparator interrupt

= Disables the comparator interrupt

bit 5:

RCIE: USART Receive Interrupt Enable bit

= Enables the USART receive interrupt

= Disables the USART receive interrupt

bit 4:

TXIE: USART Transmit Interrupt Enable bit

= Enables the USART transmit interrupt

= Disables the USART transmit interrupt

bit 3:

Unimplemented: Read as ‘0’

bit 2:

CCP1IE: CCP1 Interrupt Enable bit

= Enables the CCP1 interrupt

= Disables the CCP1 interrupt

bit 1:

TMR2IE: TMR2 to PR2 Match Interrupt Enable bit

= Enables the TMR2 to PR2 match interrupt

= Disables the TMR2 to PR2 match interrupt

bit 0:

TMR1IE: TMR1 Overflow Interrupt Enable bit

= Enables the TMR1 overflow interrupt

= Disables the TMR1 overflow interrupt

PIC16F628-20/SS Datasheet(PDF) 22 Page - Microchip Technology

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