NIPPON PRECISION CIRCUITS-30

SM5907AF

NP0018AE

2000.10

improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for

the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits

are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision

Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modifica-

tion. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or

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NIPPON PRECISION CIRCUITS INC.

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TOKYO,135-8430, JAPAN

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NIPPON PRECISION CIRCUITS INC.

Microcontroller interface functions

Pin No.

SM5903BF

SM5907AF

7 pin

N.C.

NCAS3

Device comparison with SM5903BF

Pin difference

85H (RAMS1=0, RAMS2=0)

SM5903BF: 1M DRAM

× 1

SM5907AF: 16M DRAM

× 2

92H (valid residual)

In the SM5907AF, if 16M DRAM

× 2 configuration

is selected using the 85H command (85H

RAMS1=0, RAMS2=0), the residual data is 1-bit

shifted in order to represent the maximum

32Mbits.

As pin 7 on the SM5903BF is not connected inter-

nally, the possible DRAM configurations are 4M

× 1,

4M

× 2, and 16M × 1, all of which are completely

compatible with the SM5907AF.

Note that the chip process is different, and hence

some DC characteristics are different.

When 16M

× 2 configuration is used, the microcon-

troller interface valid residual memory is different

(92H status read). See "Read command summary".