WM8955L datasheet(26/43 Pages) WOLFSON

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WM8955L

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DIGITAL AUDIO INTERFACE

The digital audio interface is used for feeding audio data into the WM8955L. It uses three pins:

•

DACDAT: DAC data input

•

DACLRC: DAC data alignment clock

•

BCLK: Bit clock, for synchronisation

The clock signals BCLK and DACLRC can be outputs when the WM8955L operates as a master, or

inputs when it is a slave (see Master and Slave Mode Operation, below).

Four different audio data formats are supported:

•

Left justified

•

Right justified

•

DSP mode

All four of these modes are MSB first. Theyare described in Audio Data Formats, below. Refer to the

Electrical Characteristic section for timing information.

MASTER AND SLAVE MODE OPERATION

The WM8955L can be configured as either a master or slave mode device. As a master device the

WM8955L generates BCLK and DACLRC and thus controls sequencing of the data transfer on

DACDAT. In slave mode, the WM8955L responds with data to clocks it receives over the digital

audio interface. The mode can be selected bywriting to the MS control bit. Master and slave modes

are illustrated below.

BCLK

DACDAT

DACLRC

WM8955L

DAC

DSP /

DECODER

BCLK

DACDAT

DACLRC

WM8955L

DAC

DSP /

DECODER

Figure 8 Master Mode

Figure 9 Slave Mode

AUDIO DATA FORMATS

In Left Justified mode, the MSB is available on the first rising edge of BCLK following a DACLRC

transition. The other bits up to the LSB are then transmitted in order. Depending on word length,

BCLK frequencyand sample rate, there maybe unused BCLK cy

cles before each DACLRC

transition.

LEFT CHANNEL

RIGHT CHANNEL

DACLRC

BCLK

DACDAT

1/fs

n-2 n-1

LSB

MSB

n-2 n-1

LSB

MSB

Input Word Length (WL)

Note: Input word length is defined bythe WL register.

Timing is shown with LRP = 1

Figure 10 Left JustifiedAudio Interface (assuming n-bit word length)

In Right Justified mode, the LSB is available on the last rising edge of BCLK before a DACLRC

transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK

frequencyand sample rate, there maybe unused BCLK cycles after each DACLRC transition.

WM8955L Datasheet(PDF) 26 Page - Wolfson Microelectronics plc

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