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FS98O02B-PCE Datasheet(PDF) 32 Page - Fortune Semiconductor Corp. |
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FS98O02B-PCE Datasheet(HTML) 32 Page - Fortune Semiconductor Corp. |
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32 / 50 page  FS98O02 Rev.1.5 32/50 SOP1P[1:0] AD1 AD2 LVDH AGND OP1 OP1O + _ OP1EN S_CH1CK[1:0] OP1P ADC ADO[23:0] ADRST ADEN ADG[1:0] VRH VRL INH INL AZ FTC FTB 100K ADM[2:0] SFT[0] FTB FTIN INH SVRH[0] VRH AD4 VRRH SOP1N[0] OP1O AD0 OP1N SINH[1:0] OP1O OP1P FTIN AD2 AD3 SINL [1:0] AD3 AD 2 AD 3 LVDL INL SVRL[1:0] AGND AD3 VRL AD3 LVDH VDD SLVD 20k 5k 20k LVDL VDDA VRRH SVR 38.5k 2.75 k 38.5k AD3 8.25 k AD2 Figure 16-3: The FS98O02C ADC Input Multiplexer and Low Pass Filter ADC Operation 2. Get the VGG (2 times VDDP / 3V or external Power Supply). 3. Get the VDDA (3.6V / 2.5V) 4. Enable the Analog Bias Circuit 5. Set SINH[2:0] and SFTA[2:0] to decide the ADC positive input port signal.(Table 16-6, Table 16-7 and Table 16-8) Table 16-6: FTIN Selection table SINH[1:0] FTIN 00 OP1O 01 OP1P 10 AD2 11 AD3 |
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