AM6548BACDXEAF datasheet(257/282 Pages) TI

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For more information, see Multimedia Card/Secure Digital (MMCSD) Interface section in the device TRM.

8.4.5.21 OSPI

The Octal Serial Peripheral Interface (OSPI™) module is a kind of Serial Peripheral Interface (SPI) module

which allows single, dual, quad or octal read and write access to external flash devices.

The OSPI module is used to transfer data, either in a memory mapped direct mode (for example a processor

wishing to execute code directly from external flash memory), or in an indirect mode where the module is

set-up to silently perform some requested operation, signaling its completion via interrupts or status registers.

For indirect operations, data is transferred between system memory and external flash memory via an internal

SRAM which is loaded for writes and unloaded for reads by a device master at low latency system speeds.

Interrupts or status registers are used to identify the specific times at which this SRAM should be accessed using

user programmable configuration registers.

For more information, see Octal Serial Peripheral Interface (OSPI) section in the device TRM.

8.4.5.22 PCIE

The Peripheral Component Interconnect Express (PCIe) subsystem is built around a multi-lane dual-mode PCIe

controller that provides low pin-count, high reliability, and high-speed data transfers at rates of up to 5.0 Gbps

per lane for serial links on backplanes and printed wiring boards.

The device includes two instantiations of PCIe subsystem named PCIE0 and PCIE1.

For more information, see Peripheral Component Interconnect Express (PCIe) Subsystem section in the device

TRM.

8.4.5.23 SerDes

The goal of the SerDes is to convert device (SoC) parallel data into serialized data that can be output over a

high-speed electrical interface. In the opposite direction, SerDes converts high-speed serial data into parallel

data that can be processed by the device. To this end, the SerDes contains a variety of functional blocks to

handle both the external analog interface as well as the internal digital logic.

For more information, see Serializer/Deserializer (SerDes) section in the device TRM.

8.4.5.24 RTI

This section describes the Real Time Interrupt (RTI) modules with Windowed Watchdog Timer (WWDT)

functionality for the device.

The Real Time Interrupt module provides timer functionality for operating systems and for benchmarking code.

The module incorporates several counters, which define the timebases needed for scheduling in the operating

system.

This module is specifically designed to fulfill the requirements for OSEK (“Offene Systeme und deren

Schnittstellen für die Elektronik im Kraftfahrzeug”; “Open Systems and the Corresponding Interfaces for

Automotive Electronics”) as well as OSEK/Time compliant operating systems.

The timers also provide the ability to benchmark certain areas of code by reading the counter contents at the

beginning and the end of the desired code range and calculating the difference between the values.

For more information, see Real Time Interrupt (RTI) Module section in the device TRM.

8.4.5.25 Timers

There are sixteen timer modules in the device.

All timers include specific functions to generate accurate tick interrupts to the operating system.

Each timer can be clocked from several different independent clocks. The selection of clock source is made from

registers in the MCU_CTRL_MMR0/CTRL_MMR0.

In the MCU domain the device provides 2 timer pins to be used as MCU Timer Capture inputs or as MCU Timer

PWM outputs. In order to provide maximum flexibility, these 2 pins may be used with any of MCU_TIMER0

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AM6548, AM6528, AM6526

SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021

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