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AM6548BACDXEAF Datasheet(PDF) 216 Page - Texas Instruments

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Part # AM6548BACDXEAF
Description  AM654x, AM652x Sitara??Processors Silicon Revision 2.1
PDF  282 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM6548BACDXEAF Datasheet(HTML) 216 Page - Texas Instruments

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Figure 7-74. eMMC/SD/SDIO in - High Speed - Receiver Mode
Figure 7-75. eMMC/SD/SDIO in - High Speed - Transmitter Mode
7.9.5.16.1.3 UHS-I SDR12, 1.8-V Legacy SDR Mode
Table 7-57 and Table 7-58 present Timing requirements and Switching characteristics for MMCi - SDR12, 1.8V
Legacy SDR in receiver and transmitter mode (see Figure 7-76 and Figure 7-77).
Table 7-57. Timing Requirements for MMCi - SDR12, 1.8-V Legacy SDR Mode
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR121
tsu(cmdV-clkH)
Setup time, MMCi_CMD valid before MMCi_CLK rising clock edge
10.04
ns
SDR122
th(clkH-cmdV)
Hold time, MMCi_CMD valid after MMCi_CLK rising clock edge
1.75
ns
SDR123
tsu(dV-clkH)
Setup time, MMCi_DAT[j:0] valid before MMCi_CLK rising clock
edge
10.04
ns
SDR124
th(clkH-dV)
Hold time, MMCi_DAT[j:0] valid after MMCi_CLK rising clock edge
1.75
ns
Table 7-58. Switching Characteristics for MMCi - SDR12, 1.8-V Legacy SDR Mode
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR125
fop(clk)
Operating frequency, MMCi_CLK
25
MHz
SDR126
tw(clkH)
Pulse duration, MMCi_CLK high
18.7
ns
SDR127
tw(clkL)
Pulse duration, MMCi_CLK low
18.7
ns
SDR128
td(clkH-cmdV)
Delay time, MMCi_CLK rising clock edge to MMCi_CMD transition
1.12
35.68
ns
SDR129
td(clkH-dV)
Delay time, MMCi_CLK rising clock edge to MMCi_DAT[j:0]
transition
1.12
35.68
ns
A.
There are two modules in MMCi: MMC0 and MMC1
AM6548, AM6528, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
www.ti.com
216
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: AM6548 AM6528 AM6526



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