TLE4953x

Functional Description

Data Sheet

9

Version 4.1, 2018-01-02

DR-R information is issued in the output pulse length when the active target wheel in front of the Hall Effect IC

moves from the pin GND to the pin VCC.

Figure 2-3 Definition of Rotation Direction

2.1

Circuit description

The circuit internally is supplied by a voltage regulator. A 2 MHz on-chip oscillator serves as a clock generator for

the DSP and the output encoder.

2.2

Speed signal circuitry

TLE4953 speed signal path comprises a pair of Hall Effect probes, separated from each other by 2.5 mm, a

differential amplifier including noise limiting low-pass filter, and a comparator triggering a switched current output

stage. An offset cancellation feedback loop is provided through a signal-tracking A/D converter, a digital signal

processor (DSP), and an offset cancellation D/A converter.

2.3

Uncalibrated mode

Occasionally a short initial offset settling time td,input might delay the detection of the input signal. (The sensor is

"blind"). During the startup phase (un-calibrated mode) the output is disabled (I = ILow). The magnetic input signal

is tracked by the speed ADC and monitored within the digital circuit. For detection the signal needs to exceed a

threshold (digital noise constant d1). When the signal slope is identified as a rising edge, a trigger pulse is issued

to a comparator. A second trigger pulse is issued as soon as the next rising edge is detected.

Between the start-up of the magnetic input signal and the time when its second extreme is reached, the PGA

(programmable gain amplifier) will switch to its appropriate position. This value is determined by the signal

amplitude and initial offset value. The digital noise constant value is changing accordingly (d1

→ d2, related to the

corresponding PGA states), leading to a change in phase shift between magnetic input signal and output signal.

After that consecutive output edges should have a nominal delay of about 360°. During the uncalibrated mode the

offset value is calculated by the peak detection algorithm as described below.

The differential input signal is digitized in the speed A/D converter and fed into the DSP part of the circuit. The

minimum and maximum values of the input signal are extracted and their corresponding arithmetic mean value is

calculated. The offset of this mean value is determined and fed into the offset cancellation DAC.

The offset update takes place when two valid extremes are found and the direction of the update has the same

orientation as the magnetic slope (valid for calibrated mode). For example an positive offset update is only possible

on a rising magnetic edge. The offset update is done independant from the output switching.