TN5015H-6I datasheet(5/13 Pages) STMICROELECTRONICS

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Figure 5. Relative variation of gate trigger current and

gate voltage versus junction temperature (typical values)

0.0

0.5

1.0

1.5

2.0

2.5

-50

-25

100

125

150

Tj(°C)

IGT,VGT [Tj] / IGT,VGT [Tj=25 °C]

IGT

VGT

Figure 6. Relative variation of holding and latching

current versus junction temperature (typical values)

0.0

0.3

0.5

0.8

1.0

1.3

1.5

1.8

2.0

2.3

2.5

-50

-25

100

125

150

Tj(°C)

IH , IL[Tj]/ IH , IL[Tj=25 °C]

Figure 7. Relative variation of static dV/dt immunity

versus junction temperature (typical values)

100

105

110

115

120 125

130

135

140 145 150

Tj(°C)

dV/dt [ Tj ] / dV/dt [ Tj = 150 °C ]

Above test equipment capability

VD = 402 V

Figure 8. Surge peak on-state current versus number of

cycles

100

150

200

250

300

350

400

450

100

1000

Number of cycles

TSM(A)

Non repetitive

Tj initial = 25 °C

Repetitive

Tc = 75 °C

Figure 9. Non repetitive surge peak on-state current for a

sinusoidal pulse with width tp < 10 ms

100

1000

10000

0.01

0.10

1.00

10.00

tp(ms)

TSM(A)

dI/dt limitation: 100 A/µs

ITSM

Tj initial = 25 °C

Figure 10. On-state characteristics (maximum values)

100

1000

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

VTM (V)

ITM (A)

Tj max :

VTO = 0.85 V

Rd = 9 mΩ

Tj = 25 °C

Tj = 150 °C

TN5015H-6I

Characteristics (curves)

DS12178 - Rev 3

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